1、Burst Mode和Pulse Skipping Mode（PSM）的区别

Burst Mode ≠ Pulse Skipping Mode，论坛有人认为Burst Mode就是Pulse Skipping Mode，这是不对的。

以LTC3624为例：

Burst Mode operation provides the highest efficiency at light loads, while pulse-skipping mode provides the lowest voltage ripple.

To minimize VOUT ripple, pulse-skipping mode can be selected by grounding the MODE/SYNC pin. In the LTC3624/ LTC3624-2, pulse-skipping mode is implemented similarly to Burst Mode operation with the peak inductor current set to be at least 132mA. This results in lower ripple than in Burst Mode operation with the trade-off being slightly lower efficiency.

以LTC3412A为例：

Burst Mode Operation

Connecting the SYNC/MODE pin to a voltage in the range of 0V to 1V enables Burst Mode operation. In Burst Mode operation, the internal power MOSFETs operate intermittently at light loads. This increases efficiency by minimizing switching losses. During Burst Mode operation, the minimum peak inductor current is externally set by the voltage on the SYNC/MODE pin and the voltage on the ITH pin is monitored by the burst comparator to determine when sleep mode is enabled and disabled. When the average inductor current is greater than the load current, the voltage on the ITH pin drops. As the ITH voltage falls below 150mV, the burst comparator trips and enables sleep mode. During sleep mode, the top power MOSFET is held off and the ITH pin is disconnected from the output of the error amplifier. The majority of the internal circuitry is also turned off to reduce the quiescent current to 64µA while the load current is solely supplied by the output capacitor. When the output voltage drops, the ITH pin is reconnected to the output of the error amplifier and the top power MOSFET along with all the internal circuitry is switched back on. This process repeats at a rate that is dependent on the load demand.

Pulse-skipping operation

Pulse-skipping operation is implemented by connecting the SYNC/MODE pin to ground. This forces the burst clamp level to be at 0V. As the load current decreases, the peak inductor current will be determined by the voltage on the ITH pin until the ITH voltage drops below 400mV. At this point, the peak inductor current is determined by the minimum on-time of the current comparator. If the load demand is less than the average of the minimum on-time inductor current, switching cycles will be skipped to keep the output voltage in regulation.