1 GIC V3逻辑组件

The GICv3 architecture consists of a set of logical components:

• A Distributor.
• A Redistributor for each PE that is supported.
• A CPU interface for each PE that is supported.
• Interrupt Translation Service components (ITS), to support the OPTIONAL translation of events into LPIs.

The Distributor, Redistributor, and ITS are collectively known as an IRI.
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The CPU interface handles physical interrupts at all implemented Exception levels:
CPU接口在所有实现的Exception级别处理物理中断:
• Interrupts that are translated into LPIs are optionally routed through the ITS to the Redistributor and the CPU interface.
被转换为lpi的中断可选地通过ITS路由到Redistributor和CPU interface。
• PPIs are routed directly from the source to the local Redistributor.
PPIs 直接从源路由到本地的Redistributor。
• SPIs are routed from the source through the Distributor to the target Redistributor and the associated CPU interface.
SPI通过Distributor 从源服务器路由到目标Redistributor 和相关的CPU interface。
• SGIs are generated by software through the CPU interface and Redistributor. They are then routed through the Distributor to one or more target Redistributors and the associated CPU interfaces.
SGIs是由软件通过CPU接口和Redistributor生成的。然后，系统会将它们通过Distributor 路由到一个或多个目标Redistributors 和关联的CPU interfaces口。

In GICv3, the ITS is an OPTIONAL component and translates events into physical LPIs. The architecture also supports direct LPIs that do not require the use of an ITS. Where LPIs are supported, it is IMPLEMENTATION DEFINED whether either:
• Direct LPIs are supported by accessing the registers in the Redistributors.
• LPI support is provided by the ITS.
An implementation must only support one of these methods.
In GICv4, the inclusion of at least one ITS is mandatory to support the direct injection of virtual LPIs.(在GICv4中，必须包含至少一个ITS，以支持虚拟LPIs的直接注入。)
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The mechanism for communication between the ITS and the Redistributors is IMPLEMENTATION DEFINED.
The mechanism for communication between the CPU interfaces and the Redistributors is also IMPLEMENTATION DEFINED.