pynq系列的资源有多少
对比
查找表107，273 39.14 140，537 51.28查找表随机存储器17，457 12.12 19，524 13.56触发器67，278 12.27 81，453 14.95 Block RAMs ( 36 KB ) 264.5 29.00 457 50.11

Table 1: Zynq-7000 and Zynq-7000S SoCs (Cont’d)oo edemmeoDevice NameZ-7007S Z-7012S Z-7014SXC7Z012SXC7Z014SXC7Z010Z-7010 XC7Z015XC7Z020Z-7015Z-7020Part NumberXC7Z007SZ-7030Z-7035Z-7045Z-7100 XC7Z030 XC7Z035 XC7Z045XC7Z100Xilinx 7 SeriesProgrammable Logic EquivalentArtix®-7 FPGAArtix-7 FPGAArtix-7 FPGAArtix-7 FPGAArtix-7 FPGAArtix-7Kintex®-7 Kintex-7Kintex-7Kintex-7 FPGAFPGAFPGAFPGAFPGAProgrammable Logic Cells23K55K65K28K74K85K125K275K350K444KLook-Up Tables (LUTs)34,40040,60017,60046,20053,200Flip-Flops14,40028,80068,80081,20035,20092,400106,40078,600157,200343,800171,900218,600437,200277,400554,800Block RAM (# 36 Kb Blocks)1.8 Mb (50)2.5 Mb (72)3.8 Mb (107)2.1 Mb (60)3.3 Mb (95)4.9 Mb (140)9.3 Mb (265)17.6 Mb (500)19.2 Mb26.5 Mb (545)(755)DSP Slices (18x25 MACCs)66120170801602204009009002,020Peak DSP Performance (Symmetric FIR)73 GMACs131 GMACs187 GMACs100 GMACs200 GMACs276 GMACs593 GMACs1,334 GMACs1,3342,622 GMACsGMACsPCI Express (Root Complex or Endpoint)(3)Gen2 x4Gen2 x4Gen2 x4Gen2 ×8Gen2 x8Gen2 x8Analog Mixed Signal(AMS) / XADC2x 12 bit, MSPS ADCs with up to 17 Differential InputsSecurity(2)AES and SHA 256b for Boot Code and Programmable Logic Configuration, Decryption, and Authentication