ADI Blackfin DSP处理器-BF533的开发详解37：图像处理专题-YUV420 转 RGB565（含源代码）

硬件准备

ADSP-EDU-BF533：BF533开发板
AD-HP530ICE：ADI DSP仿真器

软件准备

Visual DSP++软件

硬件链接

在这里插入图片描述

功能介绍

代码实现了将 YUV420 数据格式转为 RGB565 格式。YUV420 的数据格式必须是两度和色度分离的。

板卡液晶屏和 VDSP 软件商 Image Viewer 工具上的 RGB565 格式不同，其区别是 RGB 数据格式的位置，在液晶屏上，R 的数据位置位于低 5 位，B 数据位置位于高 5 位。在 Image Viewer 工具上，R 数据位于高 5 位，B 数据位于低 5 位。

为了方便查看，在代码中将这两种转换函数都列出，方便查看。

代码使用说明

YUV420 转 RGB565 函数：
static void yuv420_to_rgb565(int width, int height, const unsigned char *src, unsigned short *dst)

int width：图像宽度
int height：图像高度
const unsigned char *src：YUV420 数据入口
unsigned short *dst：RGB565 数据出口

代码调试步骤

将板卡连接仿真器，运行 VDSP 软件并连接板卡。
将工程 BF53x_YUV420_TO_RGB565.dpj 载入 VDSP 软件，编译并运行。
待代码停止，用 VDSP 下的 Image Viewer 工具以 RGB565 格式查看图像。其配置如下：

在这里插入图片描述

代码调试结果

在 Image View 窗口中可看到图像：

在这里插入图片描述

程序源码

#include <cdefBF533.h>

//#define LCD_FORMAT 1

unsigned char in_buffer[391680]=
{
#include"YUV420_320_240.dat"
};

unsigned short out_buffer[391680];

void Set_PLL(unsigned int pmsel,unsigned int pssel)
{
unsigned int new_PLL_CTL;
*pPLL_DIV = pssel;
asm(“ssync;”);
new_PLL_CTL = (pmsel & 0x3f) << 9;
*pSIC_IWR |= 0xffffffff;
if (new_PLL_CTL != *pPLL_CTL)
{
*pPLL_CTL = new_PLL_CTL;
asm(“ssync;”);
asm(“idle;”);
}
}

void Init_EBIU(void)
{
*pEBIU_AMBCTL0 = 0x7bb07bb0;
*pEBIU_AMBCTL1 = 0xffc07bb0;
*pEBIU_AMGCTL = 0x000f;
}

#ifdef LCD_FORMAT
static void yuv420_to_rgb565(int width, int height, const unsigned char *src, unsigned short *dst)
{
int line, col, linewidth;
int y, u, v, yy, vr, ug, vg, ub;
int r, g, b;
const unsigned char *py, *pu, *pv;

linewidth = width >> 1;
py = src;
pu = py + (width * height);
pv = pu + (width * height) / 4;

y = *py++;
yy = y << 8;
u = *pu - 128;
ug = 88 * u;
ub = 454 * u;
v = *pv - 128;
vg = 183 * v;
vr = 359 * v;

for (line = 0; line < height; line++) {
for (col = 0; col < width; col++) {
r = (yy + vr) >> 8;
g = (yy - ug - vg) >> 8;
b = (yy + ub ) >> 8;

  if (r < 0) r = 0;
  if (r > 255) r = 255;
  if (g < 0) g = 0;
  if (g > 255) g = 255;
  if (b < 0) b = 0;
  if (b > 255) b = 255;
  
  *dst = (((unsigned short)b>>3)<<11) | (((unsigned short)g>>2)<<5) | (((unsigned short)r>>3)<<0); 
	dst ++;
  y = *py++;
  yy = y << 8;
  if (col & 1) {
pu++;
pv++;

u = *pu - 128;
ug = 88 * u;
ub = 454 * u;
v = *pv - 128;
vg = 183 * v;
vr = 359 * v;
  }
} 
if ((line & 1) == 0) { 
  pu -= linewidth;
  pv -= linewidth;
}

}
}
#else
static void yuv420_to_rgb565(int width, int height, const unsigned char *src, unsigned short *dst)
{
int line, col, linewidth;
int y, u, v, yy, vr, ug, vg, ub;
int r, g, b;
const unsigned char *py, *pu, *pv;

linewidth = width >> 1;
py = src;
pu = py + (width * height);
pv = pu + (width * height) / 4;

y = *py++;
yy = y << 8;
u = *pu - 128;
ug = 88 * u;
ub = 454 * u;
v = *pv - 128;
vg = 183 * v;
vr = 359 * v;

for (line = 0; line < height; line++) {
for (col = 0; col < width; col++) {
r = (yy + vr) >> 8;
g = (yy - ug - vg) >> 8;
b = (yy + ub ) >> 8;

  if (r < 0) r = 0;
  if (r > 255) r = 255;
  if (g < 0) g = 0;
  if (g > 255) g = 255;
  if (b < 0) b = 0;
  if (b > 255) b = 255;
  *dst = (((unsigned short)r>>3)<<11) | (((unsigned short)g>>2)<<5) | (((unsigned short)b>>3)<<0); 
	dst ++;
  y = *py++;
  yy = y << 8;
  if (col & 1) {
pu++;
pv++;

u = *pu - 128;
ug = 88 * u;
ub = 454 * u;
v = *pv - 128;
vg = 183 * v;
vr = 359 * v;
  }
} 
if ((line & 1) == 0) { 
  pu -= linewidth;
  pv -= linewidth;
}

}
}
#endif

void main(void)
{
Set_PLL(16,4);
Init_EBIU();
yuv420_to_rgb565(320,240,in_buffer,out_buffer);
}

YUV420-RGB565

// blackfin-edinburgh-core
#include <sys/platform.h>
#include <sys/anomaly_macros_rtl.h>

/
// standard
#define IVBh (EVT0 >> 16)
#define IVBl (EVT0 & 0xFFFF)
#define UNASSIGNED_VAL 0x8181
#define INTERRUPT_BITS 0x400 // just IVG15
#define SYSCFG_VALUE 0x30

.section/DOUBLEANY program;
.file_attr requiredForROMBoot;
.align 2;

start:

/* $VDSG<insert-code-very-beginning> */ .start_of_user_code_very_beginning: // Insert additional code to be executed before any other Startup Code here. // This code is preserved if the CRT is re-generated. .end_of_user_code_very_beginning: /*$ VDSG */

/
// blackfin-edinburgh-core
#if WA_05000109
// Avoid Anomaly 05-00-0109
R1 = SYSCFG_VALUE;
SYSCFG = R1;
#endif

/
// standard
#if WA_05000229
// Avoid Anomaly 05-00-0229: DMA5_CONFIG and SPI_CTL not cleared on reset.
R1 = 0x400;
#if defined(ADSPBF538) || defined(ADSPBF539)
P0.L = SPI0_CTL & 0xFFFF;
P0.H = SPI0_CTL >> 16;
W[P0] = R1.L;
#else
P0.L = SPI_CTL & 0xFFFF;
P0.H = SPI_CTL >> 16;
W[P0] = R1.L;
#endif
P0.L = DMA5_CONFIG & 0xFFFF;
P0.H = DMA5_CONFIG >> 16;
R1 = 0;
W[P0] = R1.L;
#endif
// Clear loop counters to disable hardware loops
R7 = 0;
LC0 = R7;
LC1 = R7;

// Clear the DAG Length regs, to force linear addressing
L0 = R7;
L1 = R7;
L2 = R7;
L3 = R7;

// Clear ITEST_COMMAND and DTEST_COMMAND registers
I0.L = (ITEST_COMMAND & 0xFFFF);
I0.H = (ITEST_COMMAND >> 16);
I1.L = (DTEST_COMMAND & 0xFFFF);
I1.H = (DTEST_COMMAND >> 16);
[I0] = R7;
[I1] = R7;
CSYNC;

// Initialise the Event Vector table.
P0.H = IVBh;
P0.L = IVBl;

// Install __unknown_exception_occurred in EVT so that
// there is defined behaviour.
P0 += 2*4;		// Skip Emulation and Reset
P1 = 13;
R1.L = __unknown_exception_occurred;
R1.H = __unknown_exception_occurred;
LSETUP (.ivt,.ivt) LC0 = P1;

.ivt: [P0++] = R1;

// Set IVG15's handler to be the start of the mode-change
// code. Then, before we return from the Reset back to user
// mode, we'll raise IVG15. This will mean we stay in supervisor
// mode, and continue from the mode-change point, but at a
// much lower priority.
P1.H = supervisor_mode;
P1.L = supervisor_mode;
[P0] = P1;

/
// standard
// Initialise the stack.
// Note: this points just past the end of the section.
// First write should be with [–SP].
SP.L=ldf_stack_end;
SP.H=ldf_stack_end;
usp = sp;

// We're still in supervisor mode at the moment, so the FP
// needs to point to the supervisor stack.
FP = SP;

// Make space for incoming "parameters" for functions
// we call from here:
SP += -12;

R0 = INTERRUPT_BITS;
R0 <<= 5;	// Bits 0-4 not settable.

/
// install-default-handlers
CALL.X __install_default_handlers;

.extern __install_default_handlers;
.type __install_default_handlers,STT_FUNC;

/
// standard
R1 = SYSCFG;
R4 = R0; // Save modified list
BITSET(R1,1);
SYSCFG = R1; // Enable the cycle counter

/
// blackfin-edinburgh-core
#if WA_05000137 || WA_05000162
// Avoid Anomaly 02-00-0137
// Set the port preferences of DAG0 and DAG1 to be
// different; this gives better performance when
// performing daul-dag operations on SDRAM.
P0.L = DMEM_CONTROL & 0xFFFF;
P0.H = DMEM_CONTROL >> 16;
R0 = [P0];
BITSET(R0, 12);
BITCLR(R0, 13);
[P0] = R0;
CSYNC;
#endif

/* $VDSG<insert-code-early-startup> */ .start_of_user_code1: // Insert additional code to be executed before main here. // This code is preserved if the CRT is re-generated. .end_of_user_code1: /*$ VDSG */

/
// standard
// Enable interrupts
STI R4; // Using the mask from default handlers
RAISE 15;

// Move the processor into user mode.
P0.L=still_interrupt_in_ipend;
P0.H=still_interrupt_in_ipend;
RETI=P0;
NOP;		// Purely to prevent a stall warning

still_interrupt_in_ipend:
// execute RTI until we’ve finished servicing all
// interrupts of priority higher than IVG15. Normally one
// would expect to only have the reset interrupt in IPEND
// being serviced, but occasionally when debugging this may
// not be the case - if restart is hit when servicing an
// interrupt.
//
// When we clear all bits from IPEND, we’ll enter user mode,
// then we’ll automatically jump to supervisor_mode to start
// servicing IVG15 (which we will ‘service’ for the whole
// program, so that the program is in supervisor mode.
// Need to do this to ‘finish’ servicing the reset interupt.
RTI;

supervisor_mode:
[–SP] = RETI; // re-enables the interrupt system
R0.L = UNASSIGNED_VAL;
R0.H = UNASSIGNED_VAL;

// Push a RETS and Old FP onto the stack, for sanity.
[--SP]=R0;
[--SP]=R0;
// Make sure the FP is sensible.
FP = SP;
// Leave space for incoming "parameters"
SP += -12;

/* $VDSG<insert-code-before-device-initialization> */ .start_of_user_code2: // Insert additional code to be executed before device initialization here. // This code is preserved if the CRT is re-generated. .end_of_user_code2: /*$ VDSG */

/
// device-initialization
// initialise the devices known about for stdio.
CALL.X _init_devtab;
.extern _init_devtab;
.type _init_devtab,STT_FUNC;

/
// cplusplus
CALL.X ___ctorloop; // run global scope C++ constructors
.extern ___ctorloop;
.type ___ctorloop,STT_FUNC;

/* $VDSG<insert-code-before-main-entry> */ .start_of_user_code3: // Insert additional code to be executed before main here. // This code is preserved if the CRT is re-generated. .end_of_user_code3: /*$ VDSG */

/
// get-args
// Read command-line arguments.
CALL.X __getargv;
r1.l=__Argv;
r1.h=__Argv;

.extern __getargv;
.type __getargv,STT_FUNC;
.extern __Argv;
.type __Argv,STT_OBJECT;

/
// standard
// Call the application program.
CALL.X _main;

/
// call-exit
CALL.X _exit; // passing in main’s return value
.extern _exit;
.type _exit,STT_FUNC;

/
// standard
.start.end: // Required by the linker to know the size of the routine
// that is needed for absolute placement.

.global start;
.type start,STT_FUNC;
.extern _main;
.type _main,STT_FUNC;
.extern ldf_stack_end;
.extern __unknown_exception_occurred;
.type __unknown_exception_occurred,STT_FUNC;

/
// cplusplus
.section/DOUBLEANY ctor;
.align 4;
___ctor_table:
.byte4=0;
.global ___ctor_table;
.type ___ctor_table,STT_OBJECT;
.section/DOUBLEANY .gdt;
.align 4;
___eh_gdt:
.global ___eh_gdt;
.byte4=0;
.type ___eh_gdt,STT_OBJECT;
.section/DOUBLEANY .frt;
.align 4;
___eh_frt:
.global ___eh_frt;
.byte4=0;
.type ___eh_frt,STT_OBJECT;